--lab5combinational
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_signed.all;

entity opcoderoute is
port(
	icacheout_combin : in std_logic_vector(31 downto 0);
	reg_write, reg_dst, reg_in_src, alu_src, add_sub, data_write: out std_logic;
	logic_func, alu_func, sign_extend_func, branch_type, pc_sel: out std_logic_vector(1 downto 0));
end opcoderoute;

architecture opcoderoute_arch of opcoderoute is
begin

process(icacheout_combin)
begin
case icacheout_combin(31 downto 26) is
		when "001111" => --lui
			reg_write <= '1';
			reg_dst <= '0';
			reg_in_src <= '1';
			alu_src <= '1';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "00";
			sign_extend_func <= "00";
			branch_type <= "00";
			pc_sel <= "00";
		when "000000" => 
			case icacheout_combin(5 downto 0) is
				when "100000" => --add
					reg_write <= '1';
					reg_dst <= '1';
					reg_in_src <= '1';
					alu_src <= '0';
					add_sub <= '0';
					data_write <= '0';
					logic_func <= "00";
					alu_func <= "10";
					sign_extend_func <= "10";
					branch_type <= "00";
					pc_sel <= "00";
				when "100010" => --sub
					reg_write <= '1';
					reg_dst <= '1';
					reg_in_src <= '1';
					alu_src <= '0';
					add_sub <= '1';
					data_write <= '0';
					logic_func <= "00";
					alu_func <= "10";
					sign_extend_func <= "10";
					branch_type <= "00";
					pc_sel <= "00";
				when "101010" => --slt
					reg_write <= '1';
					reg_dst <= '1';
					reg_in_src <= '1';
					alu_src <= '0';
					add_sub <= '1';
					data_write <= '0';
					logic_func <= "00";
					alu_func <= "01";
					sign_extend_func <= "01";
					branch_type <= "10";
					pc_sel <= "00";	
				when "100100" => --and
					reg_write <= '1';
					reg_dst <= '1';
					reg_in_src <= '1';
					alu_src <= '0';
					add_sub <= '1';
					data_write <= '0';
					logic_func <= "00";
					alu_func <= "11";
					sign_extend_func <= "11";
					branch_type <= "00";
					pc_sel <= "00";
				when "100101" => --or
					reg_write <= '1';
					reg_dst <= '1';
					reg_in_src <= '1';
					alu_src <= '0';
					add_sub <= '1';
					data_write <= '0';
					logic_func <= "01";
					alu_func <= "11";
					sign_extend_func <= "11";
					branch_type <= "00";
					pc_sel <= "00";
				when "100110" => --xor
					reg_write <= '1';
					reg_dst <= '1';
					reg_in_src <= '1';
					alu_src <= '0';
					add_sub <= '1';
					data_write <= '0';
					logic_func <= "10";
					alu_func <= "11";
					sign_extend_func <= "11";
					branch_type <= "00";
					pc_sel <= "00";
				when "100111" => --nor
					reg_write <= '1';
					reg_dst <= '1';
					reg_in_src <= '1';
					alu_src <= '0';
					add_sub <= '1';
					data_write <= '0';
					logic_func <= "11";
					alu_func <= "11";
					sign_extend_func <= "11";
					branch_type <= "00";
					pc_sel <= "00";
				when "001000" => --jr
					reg_write <= '0';
					reg_dst <= '0';
					reg_in_src <= '0';
					alu_src <= '0';
					add_sub <= '0';
					data_write <= '0';
					logic_func <= "00";
					alu_func <= "00";
					sign_extend_func <= "00";
					branch_type <= "11";
					pc_sel <= "00";
				when others =>
			end case;
		when "001000" => --addi
			reg_write <= '1';
			reg_dst <= '0';
			reg_in_src <= '1';
			alu_src <= '1';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "10";
			sign_extend_func <= "10";
			branch_type <= "00";
			pc_sel <= "00";
		when "001010" => --slti
			reg_write <= '1';
			reg_dst <= '0';
			reg_in_src <= '1';
			alu_src <= '1';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "10";
			sign_extend_func <= "10";
			branch_type <= "00";
			pc_sel <= "00";
		when "001100" => --andi
			reg_write <= '1';
			reg_dst <= '0';
			reg_in_src <= '1';
			alu_src <= '1';
			add_sub <= '1';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "11";
			sign_extend_func <= "11";
			branch_type <= "00";
			pc_sel <= "00";
		when "001101" => --ori
			reg_write <= '1';
			reg_dst <= '0';
			reg_in_src <= '1';
			alu_src <= '1';
			add_sub <= '1';
			data_write <= '0';
			logic_func <= "01";
			alu_func <= "11";
			sign_extend_func <= "11";
			branch_type <= "00";
			pc_sel <= "00";
		when "001110" => --xori
			reg_write <= '1';
			reg_dst <= '0';
			reg_in_src <= '1';
			alu_src <= '1';
			add_sub <= '1';
			data_write <= '0';
			logic_func <= "10";
			alu_func <= "11";
			sign_extend_func <= "11";
			branch_type <= "00";
			pc_sel <= "00";
		when "100011" => --lw
			reg_write <= '1';
			reg_dst <= '0';
			reg_in_src <= '0';
			alu_src <= '1';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "10";
			alu_func <= "10";
			sign_extend_func <= "10";
			branch_type <= "00";
			pc_sel <= "00";
		when "101011" => --sw
			reg_write <= '0';
			reg_dst <= '0';
			reg_in_src <= '0';
			alu_src <= '1';
			add_sub <= '0';
			data_write <= '1';
			logic_func <= "10";
			alu_func <= "10";
			sign_extend_func <= "10";
			branch_type <= "00";
			pc_sel <= "00";
		when "000010" => --j
			reg_write <= '0';
			reg_dst <= '0';
			reg_in_src <= '0';
			alu_src <= '0';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "00";
			sign_extend_func <= "00";
			branch_type <= "00";
			pc_sel <= "01";
		when "000001" => --bltz
			reg_write <= '0';
			reg_dst <= '0';
			reg_in_src <= '0';
			alu_src <= '0';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "00";
			sign_extend_func <= "00";
			branch_type <= "11";
			pc_sel <= "00";
		when "000100" => --beq
			reg_write <= '0';
			reg_dst <= '0';
			reg_in_src <= '0';
			alu_src <= '0';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "00";
			sign_extend_func <= "00";
			branch_type <= "11";
			pc_sel <= "00";
		when "000101" => --bne
			reg_write <= '0';
			reg_dst <= '0';
			reg_in_src <= '0';
			alu_src <= '0';
			add_sub <= '0';
			data_write <= '0';
			logic_func <= "00";
			alu_func <= "00";
			sign_extend_func <= "00";
			branch_type <= "10";
			pc_sel <= "00";
		when others =>
end case;
end process;
end opcoderoute_arch;