--pc and icache
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
--use IEEE.std_logic_signed.all;

entity pc_icache is
port(
	clk, reset, reg_dst : in std_logic;
	nextaddressout_pcin : in std_logic_vector(31 downto 0);
	instruction : out std_logic_vector (31 downto 0);
	pcout : out std_logic_vector(31 downto 0);
	instruction_target_address : out std_logic_vector(25 downto 0);
	output_address_regfile : out std_logic_vector(4 downto 0);
	rs_out, rt_out, rd_out : out std_logic_vector(4 downto 0);
	immediate_out : out std_logic_vector(15 downto 0));
end pc_icache ;

architecture pc_i_cache of pc_icache is
	signal pc : std_logic_vector(31 downto 0);
	--signal icache_address : std_logic_vector(4 downto 0);
	signal machine_code_instruction : std_logic_vector(31 downto 0);
begin

pcout <= pc;
instruction <= machine_code_instruction;
instruction_target_address <= machine_code_instruction(25 downto 0);

pcregister: process(clk,reset,nextaddressout_pcin)
begin
			if (reset = '1') then
				pc <= (others => '0');
			elsif (clk'event and clk ='1') then
				pc <= nextaddressout_pcin;
			end if;
end process pcregister;


icache: process(pc)
begin
	case pc(4 downto 0) is
		when "00000" =>
			machine_code_instruction <= "00111100000000010111011101110111"; -- lui r1, 0111011101110111
		when "00001" =>
			machine_code_instruction <= "00000000001000000001000000100000"; -- add r2, r1, r0
		when "00010" =>
			machine_code_instruction <= "00111100000000110000111100001111"; -- lui r3, 0000111100001111
		when "00011" =>
			machine_code_instruction <= "00000000001000110010000000100010"; -- sub r4, r1, r3
		when "00100" =>
			machine_code_instruction <= "00000000000000110010100000101010"; -- slt r5, r0, r3
		when "00101" =>
			machine_code_instruction <= "00100000011001100000000011111111"; -- addi r6, r3 , 0000000011111111
		when "00110" =>
			machine_code_instruction <= "00101000011001100000000000000000"; -- slti r6, r3, 0000000000000000
		when "00111" =>
			machine_code_instruction <= "00000000001000110011000000100100"; -- and r6, r1, r3
		when "01000" =>
			machine_code_instruction <= "00000000001000110011000000100101"; -- or r6, r1, r3
		when "01001" =>
			machine_code_instruction <= "00000000001000110011000000100110"; -- xor r6, r1, r3
		when "01010" =>
			machine_code_instruction <= "00000000001000110011000000100111"; -- nor r6, r1, r3
		when "01011" =>
			machine_code_instruction <= "00110000011001101111000011110000"; -- andi r6, r3, 1111000011110000
		when "01100" =>
			machine_code_instruction <= "00110100011001101111000011110000"; -- ori r6, r3, 1111000011110000
		when "01101" =>
			machine_code_instruction <= "00111000011001100101010101010101"; -- xori r6, r3, 0101010101010101
		when "01110" =>
			machine_code_instruction <= "10001100101001100101010101010101"; -- lw r6, 0101010101010101(r5)
		when "01111" =>
			machine_code_instruction <= "10101100100001100101010101010101"; -- sw r6, 0101010101010101(r4)
		when "10000" =>
			machine_code_instruction <= "00001000000000000000000000010010"; -- j 10010
		when "10001" =>
			machine_code_instruction <= "00000000000000000000000000000000"; -- do nothing
		when "10010" =>
			machine_code_instruction <= "00100000000010010000000000010101"; -- addi r9, r0, 0000000000010101
		when "10011" =>
			machine_code_instruction <= "00001000000000000000000000010101"; -- jr r9
		when "10100" =>
			machine_code_instruction <= "00000000000000000000000000000000"; -- do nothing
		when "10101" =>
			machine_code_instruction <= "00000100010000000000000000010111"; -- 	bltz r2, 10111
		when "10110" =>
			machine_code_instruction <= "00000000000000000000000000000000"; -- do nothing
		when "10111" =>
			machine_code_instruction <= "00010000000000000000000000011001"; -- beq r0, r0, 11001
		when "11000" =>
			machine_code_instruction <= "00000000000000000000000000000000"; -- do nothing
		when "11001" =>
			machine_code_instruction <= "00010100001000100000000000011011"; -- bne r1, r2, 11011
		when "11010" =>
			machine_code_instruction <= "00000000000000000000000000000000"; -- do nothing
		when "11011" =>
			machine_code_instruction <= "00000000000000000000000000000000"; -- do nothing	
		when others =>
			machine_code_instruction <= "00000000000000000000000000000000"; -- do nothing
	end case;
end process icache;

rs_rt_etc_out: process(machine_code_instruction)
begin
	rs_out<=machine_code_instruction(25 downto 21);
	rt_out<=machine_code_instruction(20 downto 16);
	rd_out<=machine_code_instruction(15 downto 11);
	immediate_out<=machine_code_instruction(15 downto 0);
end process rs_rt_etc_out;

mux: process(reg_dst,machine_code_instruction)
begin
	case reg_dst is
		when '0' => --rt
			output_address_regfile <= machine_code_instruction(20 downto 16);
		when '1' => --rd
			output_address_regfile <= machine_code_instruction(15 downto 11);
		when others =>
	end case;
end process mux;

end pc_i_cache;